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WHY CADENCE IS NOT A TRADITIONAL EDA SOFTWARE?

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发表于 2014-9-9 10:10:17 | 显示全部楼层 |阅读模式

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Going Beyond Traditional EDAOver the past few years, Cadence has evolved from its role as a traditional EDA tool provider to become a system development partner that is enabling the design of the end products that impact our daily lives. In this interview, Nimish Modi, senior vice president for marketing and business development at Cadence, talks about the paradigm shift in the industry that has led Cadence to expand its mission and become a system design enablement company.
Q: Nimish, can you describe this transformation at Cadence?
A: Traditional EDA companies are typically focused on the automation needed to develop a chip through capabilities provided by "core EDA." But the needs of our semiconductor customers have evolved, and system companies are becoming an increasing part of our customer base. This has led us to expand beyond IC design automation and to take an end product view that enables system design by providing our customers with tools, IP, services, and software content.
As a system design enablement company, we provide a broad portfolio that focuses not just on SoC [system on chip] development but also on the design, integration, analysis, and verification of system-level components including packaging, boards, software, and system-level IP.  We consider how these tie into the mechanical and thermal aspects of the system, and expand our ecosystem partnerships accordingly.
With SoCs playing a central role in all electronic systems, I want to emphasize that core EDA is at the heart of our system design enablement strategy.  We continue to focus on providing highly compelling core EDA solutions to our SoC customers within both semiconductor and systems companies.
Q: Why are you talking about "enablement" rather than "automation?"
A: In its purest form, automation implies tooling which, in turn, implies productivity. It assumes you can consistently accelerate the task of developing a chip with fewer human resources. I would argue that with the complexity of current day SoCs, core EDA is really not just about productivity anymore, but about possibility.  
And extending beyond that, what goes into making a system goes far beyond just tooling. In addition to tools, we are supporting system design enablement by also providing content. Design IP is content, software IP is content, and these form an essential part of the shipped end product.

Q: Cadence has defined a new mission - to "innovate technologies essential to building great products that transform lives."  Can you expand on that?
A: We are in the midst of a transformation at Cadence.  Where once we were chip focused, we are now end-product focused.  You've been witnessing both our organic and inorganic innovations - products like Tempus Timing Signoff Solution and Voltus IC Power Integrity Solution that were built internally, plus the strategic acquisitions we've made to broaden our IP portfolio.  We are extremely customer driven and we will continue to build out our portfolio to provide increasing value to our semiconductor and system customers.
Q: Can you provide examples of Cadence tools, IP, or capabilities that facilitate system design enablement?
A: We can talk about three nested levels - SoC, board, and system. SoC complexity continues to grow exponentially as heterogeneous functionality is increasingly integrated onto a single die. This die needs to be fabricated at the most advanced process nodes, run sophisticated software, and be designed correctly the first time. Core EDA continues to be at the heart of our system design enablement strategy, and we are heavily investing in innovation for our core EDA portfolio. We provide highly differentiated, end-to-end tools, flows, services, and a broad IP portfolio to enable SoC development at the most advanced nodes.
At the board level, we offer integrated design, analysis, and signoff solutions through the Allegro package and board design products, as well as Sigrity analysis tools.
At the system level we provide several capabilities as well. First, we have hardware-assisted verification platforms for enabling hardware/software convergence, such as the Palladium XP platform. Second, we have system-level IP - that is, IP that traverses the chip or board. Third, in the systems analysis space, Sigrity tools can be used for inter-board power, thermal, and signal integrity validation. Finally, we are increasingly providing software content such as OS ports, middleware, and software for codecs.
Q: In 2010, Cadence outlined EDA360, a vision for the EDA industry that called for application-driven systems design. How is this new strategy different?
A: EDA360 describes a paradigm shift from the bottom-up, chip-centric design styles of the past to top-down, application-driven design. It's basically saying that the requirements of the end product are not defined by the chip as much as by the application or vertical segment in which the system will be running. We could think about system design enablement as an essential component for realizing this vision. Once specifications are defined, we can enable the development of the system by providing tools, IP, and software content.
Q: How do you see Cadence supporting this transformation over the next few years?
A: First of all, there's a lot of room to grow our core EDA business, and that business is the foundation for everything we do in system design enablement. We will continue to deliver the most innovative core EDA tools and flows at the most advanced process nodes to meet escalating challenges in performance, time to market, low power, and scalability.
Secondly, we will continue to build out our IP portfolio. Thirdly, we will continue to enhance capabilities that enable early system-level software development, including virtual prototyping, emulation, FPGA-based prototyping, and other innovative solutions.  We will also continue to enhance and augment our board- and system-level analysis capabilities for signal integrity, power, and thermal.  And we will look at continuing to add value by providing increased software content at the systems level.
While most core EDA tools are largely agnostic of the customer's product end markets, the IP, software content, and associated tools are geared towards specific vertical market segments like mobile or networking or automotive. Over time, we'll be able to deliver more comprehensive vertically oriented solutions as well. We'll take what we've already accomplished for mobile and consumer verticals and expand that to better address system and semiconductor customer needs, while enabling system design with the end product in mind.
Richard Goering




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