DDR4-JEDEC 规范与标准

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2. DDR4 SDRAM Package Pinout and Addressing ................................................................................ 2
2.1 DDR4 SDRAM Row for X4,X8 and X16 .......................................................................................2
2.2 DDR4 SDRAM Ball Pitch.....................................................................................................................2
2.3 DDR4 SDRAM Columns for X4,X8 and X16 ......................................................................................2
2.4 DDR4 SDRAM X4/8 Ballout using MO-207................................................................................. 2
2.5 DDR4 SDRAM X16 Ballout using MO-207...................................................................................3
2.6 Pinout Description ...........................................................................................................................5
2.7 DDR4 SDRAM Addressing...............................................................................................................7
3. Functional Description ............................................................................................................................8
3.1 Simplified State Diagram ................................................................................................................8
3.2 Basic Functionality........................................................................................................................9
3.3 RESET and Initialization Procedure ........................................................................................10
3.3.1 Power-up Initialization Sequence .................................................................................10
3.3.2 Reset Initialization with Stable Power ..............................................................................11
3.4 Register Definition ...........................................................................................................................12
3.4.1 Programming the mode registers .....................................................................................12
3.5 Mode Register ..................................................................................................................................13
4. DDR4 SDRAM Command Description and Operation .................................................................. 24
4.1 Command Truth Table .....................................................................................................................24
4.2 CKE Truth Table ................................................................................................................25
4.3 Burst Length, Type and Order ..................................................................................................26
4.3.1 BL8 Burst order with CRC Enabled ..............................................................................26
4.4 DLL-off Mode & DLL on/off Switching procedure .......................................................................27
4.4.1 DLL on/off switching procedure ..................................................................................27
4.4.2 DLL “on” to DLL “off” Procedure ...........................................................................................27
4.4.3 DLL “off” to DLL “on” Procedure .......................................................................................28
4.5 DLL-off Mode..............................................................................................................................29
4.6 Input Clock Frequency Change ........................................................................................................30
4.7 Write Leveling.................................................................................................................................31
4.7.1 DRAM setting for write leveling & DRAM termination function in that mode ...................................32
4.7.2 Procedure Description .........................................................................................................33
4.7.3 Write Leveling Mode Exit ...........................................................................................34
4.8 Temperature controlled Refresh modes ..........................................................................................34
4.8.1 Normal temperature mode .................................................................................................34
4.8.2 Extended temperature mode ................................................................................................ 34
4.9 Fine Granularity Refresh Mode ..................................................................................................35
4.9.1 Mode Register and Command Truth Table .......................................................................35
4.9.2 tREFI and tRFC parameters ......................................................................................35
4.9.3 Changing Refresh Rate ....................................................................................................36
4.9.4 Usage with Temperature Controlled Refresh mode...................................................... 36
4.9.5 Self Refresh entry and exit ....................................................................................................37
4.10 Multi Purpose Register ....................................................................................................................37
4.10.1 DQ Training with MPR .......................................................................................................37
4.10.2 MR3 definition .................................................................................................................37
4.10.3 MPR Reads...................................................................................................................... 38
4.10.4 MPR Writes..................................................................................................................... 40
4.10.5 MPR Read Data format .................................................................................................43
4.11 Data Mask(DM), Data Bus Inversion (DBI) and TDQS...............................................................48
4.12 ZQ Calibration Commands ..............................................................................................................50
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