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高速互联过孔设计

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发表于 2015-2-6 11:26:47 | 显示全部楼层 |阅读模式

高速电路PCB网,专注于嵌入式方案,信号完整性和电源完整性仿真分析,高速电路PCB设计,各种EDA工具(Cadence\Mentor\\AD\\CAM\ANSYS HFSS)交流学习。

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AbstractAs digital signal rates rise to the multi-gigabit range, the influences of system interconnects on the signal integrity of advanced packages or printed circuit boards have become more and more significant and non-negligible1. Compared to the system impedance Z0, the interconnect effects could be inductive or capacitive. For example, a typical through-hole via structure depicted in Fig. 1shows an overall capacitive property owing to the relatively short distance between the via barrel and the anti-pad. A negative reflection will be induced and the rising edge of transmitted signal will be degraded when a ramped signal goes through it. As shown in Fig. 2, one remedy is to add high-impedance lines locally to overcome the excessive capacitance. Besides, the transition bandwidth can be further enhanced by using a capsule-shaped anti-pad longitudinally instead2, which corresponds to a much smaller reflection noise. The complete design flow for this kind of compensation technique is described in Fig. 3.

In recent years, because of the greater robustness and better approximation, electro-magnetically trained artificial neural network (EM-ANN) approaches have gradually gained wide recognition, and based on which, the relationship between the geometric parameters and electrical performances can thus be quickly identified. The idea can be further used to find the so-called electrical solution space for the design of reflection- less interconnects3. Similarly, for a 3-layer through-hole via structure, the solution space with a 10% impedance variation compared to 50 is clearly marked in Fig. 4. The time- and frequency-domain measured results shown inFig. 5 have verified the design concept.

Fig. 1. Time-domain reflection/transmission (TDR/T) waveform of a typical through-hole via structure.


Fig. 2. Measured reflection noises for the three kinds of designed via structures.


Fig. 3. Complete design flow chart for the compensation of typical via strucute.


Fig. 4. Electrical solution space of 3-layer through-hole via structure identified by artificial neural network.


Fig. 5. Measured results in time and frequency domains for the verification of the neural network based via design.


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